Application of Ogiue, Patent Appeal No. 74-539.

• Decision Date: 30 June 1975
• Docket Number: Patent Appeal No. 74-539.
• Parties: Application of Katumi OGIUE.
• Court: U.S. Court of Customs and Patent Appeals (CCPA)

517 F.2d 1382

Application of Katumi OGIUE.

Patent Appeal No. 74-539.

United States Court of Customs and Patent Appeals.

June 30, 1975.

Paul M. Craig, Jr., Washington, D. C., attorney of record, for appellant.

Joseph F. Nakamura, Washington, D. C., for the Commissioner of Patents, R. V. Lupo, Washington, D. C., of counsel.

Before MARKEY, Chief Judge and RICH, BALDWIN, LANE and MILLER, Judges.

RICH, Judge.

This appeal is from the decision of the Patent and Trademark Office (PTO) Board of Appeals affirming the final rejection of claims 10-19 (see Appendix), all the claims remaining in appellant's application, serial No. 870,946, filed October 8, 1969,¹ entitled "Manufacture of Semiconductor Device." We affirm.

FACTS

The Invention

In the manufacture of integrated semiconductor circuits, the art prefers to isolate electrically the several regions on the surface of the semiconductor chip from one another by means of reverse-biased PN junctions. According to appellant, this was done before his invention by epitaxially depositing a monocrystalline layer of one conductivity type on a monocrystalline substrate of a second conductivity type, and then selectively diffusing an impurity through the epitaxial layer down to the surface of the substrate, so as to define an annular or grid-like region of the first conductivity type on the substrate of the second conductivity type. The disadvantage of this method is that the decrease of impurity concentration as the diffused layer deepens prevents adequate isolation unless the diffusion treatment is effected at high temperatures or for long periods of time, which causes auto-doping of the epitaxial layer by the impurities in the substrate.

Appellant claims to have invented an improved electrical isolation technique, embodied in a semiconductor device fabricated in accordance with his invention. His specification says:

The gist of this invention resides in that a plurality of monocrystalline semiconductor layers and a polycrystalline semiconductor layer integrally and contiguously provided between said monocrystalline semiconductor layers are formed on a surface of a material serving as a substrate, and that said monocrystalline layers (these layers are used to define circuit elements or as means for providing a desired circuit function) are electrically isolated from each other by said substrate and said polycrystalline layer. To this end, a region of an opposite conductivity type to that of said monocrystalline layers is included in said polycrystalline layer. The formation of this opposite conductivity type region is effected by virtue of the nature of an impurity that is diffused at a high speed into the polycrystalline semiconductor layer (that is, the fact that it has a high diffusion coefficient).

Fig. 3 of the application illustrates in part the manufacture of appellant's device:

Silicon dioxide (SiO2) layers 21 are deposited through a mask onto a P-type monocrystalline substrate 1. The substrate is then placed in a reaction furnace, through which flows a silicon halide (SiCl4) gas containing an N-type impurity, so that a semiconductor silicon layer is epitaxially deposited on the surface of the substrate. Over the SiO2 layers 21 grow polycrystalline regions 42; a monocrystalline layer 41 grows over the remainder of the substrate. Fig. 4 shows what is done next:

Another SiO2 film 22 is deposited onto the surface of the epitaxial layer, and then is partially etched away to expose, inter alia, the semiconductor surface directly over the SiO2 layers 21. Thereafter, a P-type impurity is thermally diffused into the device, creating P-type circuit elements 51a and 51b as well as P-type isolating layers 52 and isolating PN junctions 53. Thus, the formerly N-type polycrystalline regions 42 (Fig. 3) have been changed to P-type regions 52 (Fig. 4). Since impurities diffuse through polycrystalline regions much more rapidly than through monocrystalline regions, P-type isolating regions 52 may be grown through the N-type epitaxial layer down to the P-type substrate 1 without corresponding penetration to the substrate of circuit elements 51a and 51b.

The Cited Patents

                  Iwata et al. (Iwata)   3,475,661   Oct. 28, 1969
                  Manasevit et al
                    (Manasevit)          3,393,088   July 16, 1968
                  Doo                    3,386,865   June  4, 1968
                

The application that matured into the Iwata patent was filed in the United States on February 6, 1967, which was after appellant's Japanese priority date. Iwata's invention provides electrical isolation of semiconductor elements by including in otherwise monocrystalline epitaxial layers polycrystalline regions into which impurities are diffused to produce PN junctions between the polycrystalline and monocrystalline portions. The Iwata specification and drawings explain the invention more fully (emphasis ours):

In FIGURE 1, reference numeral 10 indicates generally a P-type single crystal silicon substrate having a plurality of continuous or discontinuous grooves 11 formed on one face thereof. The grooves 11 act as sites for growing subsequently applied polycrystalline layers.

An N-type silicon epitaxial layer 12 is then deposited over the grooved surface by means of vapor deposition. The grooves 11 cause the N-type silicon to be deposited as polycrystalline regions 13 which grow into a generally wedge shape. The remainder of the layer 12 is a single crystal layer of N-type silicon.

Epitaxial growth processes are well known in the art and provide an extension of the original crystalline structure of the substrate, with the atoms of the epitaxial layer being aligned as a continuation of the original crystalline structure. In a typical epitaxial growth process, the substrate is heated in a reaction chamber and a gas stream containing vapors of a silicon halide such as silicon tetrachloride doped with a small amount of phosphorous trichloride is passed over the heated substrate in the chamber under vacuum conditions. A reaction takes place at the surfaces, and a film or layer of silicon grows in monocrystalline form on the surface of the substrate. The impurity material also deposits in elemental form along with the silicon on the substrate.

Following the deposition of the epitaxial layer 12, the substrate is heated to diffuse the P-type impurity from the substrate 10 into the epitaxial layer 12. The acceptor impurity contained in the substrate 10 diffuses into the polycrystalline areas 13 more rapidly than in the single crystal area so that a diffused area 14 substantially surrounding the wedge-shaped polycrystalline area 13 is produced, the diffused area 14 providing PN junctions between the single crystal area 12 and the substrate 10. The PN junction is substantially uniform in thickness, both at the region where it is parallel to the substrate 10 and the region overlying the wedge-shaped polycrystalline areas 13.

Sites for the production of polycrystalline areas as part of an epitaxial growth process can also be provided by depositing a layer of silica on the substrate instead of providing grooves. The silica particles provide discontinuities which behave in substantially the same manner as the grooves 11 shown in the figures.

Having produced his polycrystalline regions 13 and having diffused them to produce PN junctions, Iwata describes how he can produce semiconductor devices as follows, referring to Fig. 5 of his drawings:

FIGURE 5 illustrates the production of an integral circuit semiconductor device using the process of the present invention. In the manufacture of the integral circuit of FIGURE 5, the steps of FIGURES 1 through 3 are repeated after which the upper surface of the device is planed or otherwise cut to provide a surface 17 in which portions of the polycrystalline area 13 are exposed. Alternatively, the epitaxial layer 12 can be grown originally so that the upper ends of the polycrystalline area 13 extend up to the surface of the single crystal layer 12, i. e., the depth of deposition of the epitaxial layer 12 can be controlled so that it does not exceed the height of the polycrystalline area 13.

In the device of FIGURE 5, the single crystal epitaxial layers 12 are electrically separated from each other by PN junctions 14 so that the individual areas 12 can each provide circuit elements such as transistors, diodes, capacitors or resistances.

The improved elements of the present invention can also be made by other modified techniques, e. g., starting with a substrate of P-type silicon, an epitaxial layer of P-type silicon can be deposited on the substrate, with the formation of polycrystalline areas as previously described. Then, a donor impurity can be diffused through the substrate and through the polycrystalline areas to form individual epitaxial areas which are separated from the polycrystalline areas by PN junctions.

As a further modified form of the invention, an intrinsic silicon substrate can be provided with an epitaxial layer of P-type silicon with intermediate polycrystalline areas. Then, the donor impurity can be diffused through the epitaxial layer to form diffused areas which provide PN junctions between the polycrystalline areas and the P-type epitaxial layer.

As will be explained later, the examiner and the board used, in the rejection of appellant's claims, claims 1-5 of Iwata, which read as follows:

1. A semiconductor device comprising a substrate of one conductivity type, means on said substrate providing discontinuities in the surface thereof, a layer of the opposite conductivity type formed on said substrate and constituting an extension of the original crystalline structure of said substrate, said layer including spaced polycrystalline portions over said discontinuities, and a diffused region along said polycrystalline portions providing PN junctions between said polycrystalline portions and said layer.

2. The device of claim 1 in which said diffused region contains the same impurity as

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