Ex parte Martin

• Docket Number: Appeal 2023-002848,Application 16/136,553,Technology Center 2100
• Decision Date: 19 January 2024
• Parties: Ex parte CHRIS MARTIN, DAVID HOUGH, PAUL BRASNETT, CAGATAY DIKICI, JAMES IMBER, and CLIFFORD GIBSON
• Court: Patent Trial and Appeal Board

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Ex parte CHRIS MARTIN, DAVID HOUGH, PAUL BRASNETT, CAGATAY DIKICI, JAMES IMBER, and CLIFFORD GIBSON

Appeal 2023-002848

Application 16/136,553

Technology Center 2100

United States Patent and Trademark Office, Patent Trial and Appeal Board

January 19, 2024

FILING DATE: 09/20/2018

Before ROBERT E. NAPPI, JASON J. CHUNG, and BACH V. HOANG, Administrative Patent Judges.

DECISION ON APPEAL

HOANG, Administrative Patent Judge.

STATEMENT OF THE CASE

Pursuant to 35 U.S.C. § 134(a), Appellant^[1] appeals from the Examiner's decision to reject claims 1-20. See Final Act. 1. We have jurisdiction under 35 U.S.C. § 6(b).

We affirm.

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CLAIMED SUBJECT MATTER

The claims are directed to a hardware implementation of a deep neural network (DNN) that outputs processed data in a desired format. See Spec. Abstract. Claim 1, reproduced below, illustrates the claimed subject matter:

1. A method in a hardware implementation of a Deep Neural Network (DNN) configured to implement the DNN by processing data using one or more hardware passes, wherein during each hardware pass the hardware implementation receives at least a portion of input data for a layer of the DNN and processes the received input data in accordance with at least that layer to produce processed data, the method comprising

receiving a set of input data for a hardware pass of the hardware implementation, the set of input data representing at least a portion of input data for a particular layer of the DNN

receiving information indicating a desired output data format for the hardware pass and information identifying a desired internal data format for the hardware pass, the desired internal data format for the hardware pass being independent from the desired output data format for the hardware pass

processing the set of input data according to one or more layers of the DNN associated with the hardware pass to produce processed data, the one or more layers comprising the particular layer of the DNN, wherein processing the set of input data according to the one or more layers of the DNN associated with the hardware pass comprises receiving or generating an internal data set and converting the internal data set into the desired internal data format for the hardware pass, the internal data set being data within the hardware implementation; and

converting the processed data into the desired output data format for the hardware pass to produce output data for the hardware pass.

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REFERENCES

The Examiner relies on the following references to reject the claims:

Name	Reference	Date
Falcon	US 2016/0026912 A1	Jan. 28, 2016
Yang	US 2017/0061279 A1	Mar. 2, 2017

REJECTION^[2]

The Examiner maintains the following rejections:

Claims 1-20 are rejected under 35 U.S.C. § 103 as being unpatentable over Falcon and Yang. Final Act. 15-71; see Adv. Act. 1-2.^[3]

OPINION

"receiving information indicating..."

Appellant contends the Examiner erred in finding Falcon and Yang, either alone or in combination, teaches

receiving information indicating a desired output data format for the hardware pass and information identifying a desired internal data format for the hardware pass, the desired internal data format for the hardware pass being independent from the desired output data format for the hardware pass . . . receiving or generating an internal data set and converting the internal data set into the desired internal data format for the

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hardware pass, the internal data set being data within the hardware implementation,

as recited in independent claim 1. Appeal Br. 8-17.

The Examiner finds that the combination of Falcon and Yang teaches the disputed limitations. Final Act. 6-10, 19-22; Ans. 17-18. In particular, the Examiner finds Falcon teaches

receiving . . . information identifying a desired internal data format for the hardware pass, the desired internal data format for the hardware pass being independent from the desired output data format for the hardware pass . . . receiving or generating an internal data set and converting the internal data set into the desired internal data format for the hardware pass, the internal data set being data within the hardware implementation,

as recited in claim 1. Final Act. 19-22 (citing Falcon ¶¶ 89, 91, 93, 102-103, 105-106, 119, Figs. 12 and 14); Ans. 17. That finding relies on Figures 12 and 14 of Falcon and their associated disclosures, which describe a calculation circuit which receives a scale factor (Falcon ¶ 89 ("calculation circuit 1200 may accept inputs from scale factor 1208")), then applies that scale factor to format, e.g., by scaling up, both weight data and generated partial results data (Falcon ¶¶ 91, 94 ("weights 1204 may be scaled up to meet a defined range"), 120 ("partial results may be scaled up in precision by shifting left according to the determined scale factors")). Final Act. 19, Ans. 13, 17. The calculation circuit then scales down, truncates, or normalizes the ultimate result of the calculation circuit into an expected output format differing from the partial results or weight format (Falcon ¶¶ 103 ("results ... are normalized for use in a range expected by other elements, such as other calculation circuits"), 124 ("results may be scaled

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down . . . results may be truncated according to an expected output format... the result may be output as the determined calculated value associated with the layer.")). Final Act. 20 Ans. 17. The Examiner further finds Yang teaches the remaining disputed limitation, "receiving information indicating a desired output data format for the hardware pass," because Yang discloses receiving an "instruction [which] identifies a desired decimal point placement of the result of [a calculation] operation" and a "final intermediate may then be formatted (e.g., truncated) at the end to [that] desired fixed point representation format." Final Act. 23-24 (citing Yang ¶¶ 49, 51-52, 54, 66, and 76); Ans. 18-19.

Appellant first attacks Falcon, contending Falcon does not teach "receiving information indicating a desired output data format for the hardware pass and information identifying a desired internal data format for the hardware pass, the desired internal data format for the hardware pass being independent from the desired output data format for the hardware pass," as recited in claim 1. Appeal Br. 12-15; Reply Br. 5. Specifically, Appellant argues Falcon's scale factor "cannot specify two independent formats" and, so, "does not disclose receiving information identifying two distinct and independent data formats - a desired output data format...