In re Keller

• Citation: 642 F.2d 413
• Decision Date: 12 February 1981
• Docket Number: Appeal No. 80-573.
• Parties: In re John W. KELLER, Jr., Reese S. Terry, Jr., and Gomer L. Davies.
• Court: U.S. Court of Customs and Patent Appeals (CCPA)

642 F.2d 413

In re John W. KELLER, Jr., Reese S. Terry, Jr., and Gomer L. Davies.

Appeal No. 80-573.

United States Court of Customs and Patent Appeals.

February 12, 1981.

Henry D. Pahl, Jr., Boston, Mass., Gilbert H. Hennessey, Washington, D. C., for appellants.

Joseph F. Nakamura, Sol., Patent & Trademark Office, Thomas E. Lynch, Washington, D. C., of counsel.

Before MARKEY, Chief Judge, and RICH, BALDWIN, MILLER, and NIES, Judges.

NIES, Judge.

This appeal is from the decision of the Patent and Trademark Office (PTO) Board of Appeals (board) in reissue application serial No. 865,610, filed December 29, 1977,¹ for "Digital Counter Driven Pacer." Claims 1, 2, 6, 7, and 9-16 (all of the claims in the application) stand rejected on the ground of a defective reissue declaration, and claims 1, 2, 6, 7, 9-11, 13, and 14 are rejected on the ground of obviousness in view of the following references:

                      Inventor           U.S. Patent No.      Issue Date
                      --------           ---------------      ----------
                Keller, Jr. (Keller)        3,253,596        May 31, 1966
                Berkovits                   3,345,990        Oct. 10, 1967
                

Walsh and Moore (Walsh), The American Journal of Medical Electronics, First Quarter, 1966, pages 29-34.

Claim 12 is allowable over the art of record but is objected to on the ground that the claim depends from a rejected claim. Claims 15 and 16 are allowable over the art of record.² We affirm in part and reverse in part.

Claims 1, 2, 6, 7, and 9-16³ are rejected under 35 U.S.C. § 251 on the ground that the declaration made by applicant to support the reissue application does not particularly specify the prior art being brought to the attention of the examiner as required by 37 CFR 1.175(a)(4), does not particularly specify the errors relied upon by applicant and how the errors arose as required by 37 CFR 1.175(a)(5), and does not state that the errors arose "without any deceptive intention" on the part of applicant as required by 37 CFR 1.175(a)(6).⁴

Claims 1, 2, 6, 7, 9, 10, 11, 13, and 14 are rejected as unpatentable in view of Keller taken with Walsh. Claims 1 and 2 are further rejected as unpatentable in view of Berkovits taken with Walsh. The statutory basis of these rejections is 35 U.S.C. § 103.

The Invention

The claimed invention is a cardiac pacer having a digital counter.

As background, the specification explains:

In the normal heart, electrical signals are generated and appear in the atrium at a rate of approximately 60 to 120 times per minute, depending on such factors as body size and amount of physical exertion. Approximately 0.1 second after such a signal has appeared in the atrium, it is transferred to the ventricle of the heart, which reacts to the stimulation by contracting. This contraction forces blood from the ventricle into the arterial system and thence to the entire body. The delay between the appearance of an electrical signal in the atrium and its appearance in the ventricle is called the A-V delay. Following the contraction of the ventricle, there is an insensitive period lasting about 0.4 second, during which time the heart is unresponsive to electrical pulses. This time is referred to as the refractory delay period.

A common type of heart failure is irregularity in the generation of atrial potentials. In some cases, these potentials appear at only a low rate; in others, they cease entirely for extended periods though at other times the signals may be generated with perfect regularity. It is in persons suffering from this kind of cardiac disorder that a standby or so-called demand mode pacer is used. This device is designed to apply stimulating pulses to the ventricle, by means of an electrode implanted therein, only when the heart fails to generate pulses spontaneously. When natural pulses regularly appear, the pacer provides no stimulation; when they appear irregularly, the pacer adjusts its timing to integrate its artificial pulses with the natural ones. This type of pacer is often provided with circuitry which stimulates the refractory delay period of the heart. The reason for including such delay circuitry is that a spontaneous electrical signal which appears a short time after delivery of an artificial pulse is ineffective to pump blood, either because the natural refractory period of the heart caused the heart to ignore the spontaneous pulse or because the ventricle has not had time following the previous beat to be refilled with blood. A simulated refractory period causes the pacer likewise to ignore these ineffective beats. The device's timing continues just as if the beats had never occurred.

Another form of heart disease is the so-called A-V block in which the patient's heart undergoes normal or near-normal atrial contraction but the atrial signal is not transferred to the ventricle. With such a patient, it is desirable to use a so-called synchronous pacer which detects atrial signals and supplies to the ventricle a stimulating pulse about 0.1 second later, a period which constitutes a simulated A-V delay. In the absence of detected atrial signals, the pacer supplies ventricular pulses at a fixed rate. The synchronous pacer, like the demand pacer, is often provided with refractory delay simulation.

Summarizing the invention, the specification states:

A cardiac pacer according to the present invention times various events and delays by means of a digital counter which is driven by an oscillator operating at a frequency which is a relatively large multiple of a normal heartbeat rate. A cardiac stimulating pulse is generated at a predetermined point in the count. Thus, if the counter cycles repetitively, the heart is stimulated at a predetermined fixed rate. To provide demand mode operation, the counter is reset in response to spontaneous cardiac signals thereby to prevent stimulation when the heart is functioning normally. To provide synchronous mode operation, the counter is reset to a point preceding the stimulation count by an amount which simulates a normal A-V delay.

The use of digital count down circuitry permits both the various delays and the durations of the stimulating pulses to be accurately timed. Further, by counting down from a relatively high frequency, an oscillator having a relatively short duty cycle may be used so as to reduce battery drain. Further, the use of a relatively short oscillator period permits timing components, e. g., capacitors, of relatively small size to be used.

A block diagram of a cardiac pacer, according to the present invention, appears below:

The specification indicates that if the pacer is to operate in the demand mode in a particular patient, an output electrode implanted in the patient's heart at a location suitable for stimulating ventricular contractions is connected to output terminal 6 of the pacer. If the pacer is to operate in the synchronous mode in a particular patient, an output electrode implanted in the patient's heart at a location suitable for stimulating ventricular contractions is connected to output terminal 9 of the pacer.

According to the specification, for demand mode operation an input electrode implanted to detect ventricular signals of the patient's heart is connected to input terminal 10 of the pacer. For synchronous mode operation, an input electrode implanted to detect atrium signals of the patient's heart is connected to the input terminal 10. "Cardiac signals applied to the input terminal 10 are amplified and shaped by means of an amplifier 11 so as to be squared into waveforms suitable for use with digital circuitry, as is understood by those skilled in the art."

The timing of the different events occurring in the operation of appellant's pacer is provided by a digital counter 3.

The counter is driven by an oscillator 1 which establishes the time base. As illustrated, counter 3 comprises a nine stage binary divider and the oscillator 1 runs at a frequency which is relatively high with respect to the contemplated range of heartbeat rates or frequencies....

As is conventional, counter 3 provides a two-stage output signal for each stage of binary division....

As is also conventional, the counter 3 runs cyclically, that is, the states of the binary output signals pass through a sequence which repeats after all the possible combinations have been utilized.... Further, the counter may at will be reset to a predetermined starting point by the application of a reset signal to a reset terminal, designated R. The starting point of the counter is considered herein to be the zero count and the various possible states or counts are considered to be zero through 511.⁵

In describing operation of the pacer in the demand mode, the specification states that:

... if the patient's heart is beating normally at a rate which is more than the free running rate of the pacer, i. e. about 70 beats per minute, and not more than twice that rate, i. e. about 140 beats per minute, the counter 3 will be reset to its zero count by each natural heartbeat before a count of 511 is reached. Thus, the patient's heart will not be stimulated at all if it is beating spontaneously within this 2-to-1 range of rates. However, if no spontaneous heartbeat is detected between count 256 and count 511, the pacer will then stimulate the patient's heart at the end of the full count period, that is, after a period which corresponds to the 70 pulse per second free running rate. In other words, the difference between the starting point count and the end of the counting sequence establishes a maximum interval between heartbeats. Accordingly, if the spontaneous heart signals disappear intermittently, the pacer will integrate its operation with the normal heartbeat.

In describing operation of the pacer in the synchronous mode, the specification states:

The resetting of counter 3 is controlled in response to detected signals as described previously. Thus, the counter is reset to its zero count if an atrial signal is

...