Samsung Elecs. Co. v. Acorn Semi, LLC

• Decision Date: 09 February 2022
• Docket Number: 395 B2,090,IPR2020-01207,Patent 10
• Parties: SAMSUNG ELECTRONICS CO., LTD., Petitioner, v. ACORN SEMI, LLC, Patent Owner.
• Court: Patent Trial and Appeal Board

SAMSUNG ELECTRONICS CO., LTD., Petitioner, v. ACORN SEMI, LLC, Patent Owner.

IPR2020-01207

Patent 10, 090, 395 B2

United States Patent and Trademark Office, Patent Trial and Appeal Board

February 9, 2022

Final Written Decision Determining Some Challenged Claims Unpatentable Dismissing Patent Owner's Motion to Exclude 35 U.S.C.§318(a)

For PETITIONER: Yung-Hoon Ha, Theodore Konstantakopoulos, John Desmarais, Cosmin Maier, Christian Dorman, DESMARAIS LLP

For PATENT OWNER: Matthew Phillips, Kevin Laurence, Derek Meeker Rachel Slade, LAURENCE & PHILLIPS IP LAW

Tarek Fahmi ASCENDA LAW GROUP, PC

Before BRIAN J. McNAMARA, JOHNR. KENNY, and AARON W. MOORE Administrative Patent Judges.

DECISION

KENNY Administrative Patent Judge.

I. INTRODUCTION

Samsung Electronics Co., Ltd. ("Petitioner") filed a Petition, Paper 2 ("Petition" or "Pet."), to institute an inter partes review of claims 1-6, 8-12, and 14-16 ("challenged claims") of U.S. Patent No. 10, 090, 395 B2 (Ex. 1001, "'395 patent"). Acorn Semi, LLC ("Patent Owner") filed a Preliminary Response, Paper 11 ("Prelim. Resp."), contending that the Petition should be denied as to all challenged claims.

On February 10, 2021, we instituted an inter partes review of all challenged claims. Paper 21 ("Institution Decision" or "Inst. Dec"). Patent Owner filed a Patent Owner Response (Paper 29, "PO Resp.") and an Updated Mandatory Notice reporting a jury verdict in a related district court litigation (Paper 31; Ex 2121). Petitioner filed a Reply (Paper 34, "Pet. Reply"), and Patent Owner filed a Sur-reply (Paper 39, "PO Sur-reply"). Patent Owner also filed a Motion to Exclude certain cross-examination testimony of its expert witness, Dr. Kelin J. Kuhn (Paper 40 "Mot. Excl."). Petitioner filed an Opposition to Patent Owner's Motion to Exclude (Paper 42, "Opp. Mot. Excl."), and Patent Owner filed a Reply to Petitioner's Opposition to Patent Owner's Motion to Exclude (Paper 44, "Reply Mot. Excl."). A transcript of an oral hearing held on October 13, 2021 (Paper 48, "Tr.") has been entered into the record.

We have jurisdiction under 35 U.S.C. § 6. For the reasons discussed below, we determine that Petitioner has shown, by a preponderance of the evidence, that claims 1-6, 8-10, 15, and 16 are unpatentable. Petitioner, however, has not shown, by a preponderance of the evidence, that claims 11, 12, and 14 are unpatentable.

A. Related Matters

The Petition states that the '395 patent is asserted in Acorn Semi, LLC v. Samsung Electronics Co. Ltd., Civil Action No. 2:19-cv-347 (E.D. Tex.) ("Related Litigation"), and that the complaint was served on October 24, 2019. Pet. 3 (citing Ex. 1039).

Patent Owner identifies IPR2020-01282 ('" 1282 IPR")as also concerning the' 3 9 5 patent. Paper 5, 2. Petitioner and Patent Owner identify other inter partes reviews concerning patents related to the '395 patent that may be affected by the outcome of this proceeding. See Pet. 3, Paper 5, 2. Petitioner also identifies patents and patent applications that are related to the '395 patent. See Pet. 4.

B. The 395 Patent

The '395 patent "relates to a process for depinning the Fermi level of a semiconductor at a metal-interface layer-semiconductor junction and to devices that employ such a junction." Ex. 1001, 1:32-35. The'395 patent explains that Schottky's theory concerning the ability of a junction to conduct current in one direction more favorably than in the other direction, i.e., the rectifying behavior of a metal/semiconductor junction (e.g., an aluminum/silicon junction) depends upon a barrier at the surface of the contact between the metal and the semiconductor. Id. at 1:52-64. Because the barrier height at the metal/semiconductor interface determines the electrical properties of the junction, controlling the barrier height is an important goal. Id. at 3:10-21.

The '395 patent further explains that Schottky's theory postulates the height of the barrier, as measured by the potential necessary for an electron to pass from the metal to the semiconductor, is the difference between the work function of the metal (i.e., the energy required to free an electron at the Fermi level (the highest occupied energy state of the metal at T=O)) and the electron affinity of the semiconductor (i.e., the difference between the energy of a free electron and the conduction band of the semiconductor); but experimental results indicate a weaker variation of the barrier height with the work function than implied by this model. Ex. 1001, 1:55-2:9. To explain the discrepancy between the predicted and observed behavior, Bardeen introduced the concept of semiconductor surface states, i. e., energy states within the bandgap between the valence and conduction bands at the edge of the semiconductor crystal that arise from incomplete covalent bonds, impurities, and other effects of termination. Id. at 2:10-24, Fig. 1 (showing dangling bonds 120). Although Bardeen's model assumes that surface states are sufficient to pin the Fermi level in the semiconductor at a point between the valence and conduction bands, such that the barrier height should be independent of the metal's work function, in experiments, this condition is observed rarely. Id. at 2:25-31.

According to the '395 patent, Tersoff proposed that the Fermi level of a semiconductor is pinned near an effective "gap center" due to metal induced gap states (MIGS), which are energy states in the bandgap of the semiconductor that become populated with metal. Ex 1001, 2:41-47. Thus, the wave functions of electrons in the metal do not terminate abruptly at the surface of the metal, but decay in proportion to the distance from the surface, extending inside the semiconductor. Id. at 2:50-54.

To maintain the sum rule on the density of states in the semiconductor, electrons near the surface occupy energy states in the gap derived from the valence band such that the density of states in the valence band is reduced. To maintain charge neutrality, the highest occupied state (which defines the Fermi level of the semiconductor) will then lie at the crossover point from states derived from the valence band to those derived from the conduction band. This crossover occurs at the branch point of the band structure.

Id. at 2:54-63. The '395 patent also notes one further surface effect on diode characteristics is inhomogeneity, i.e., "if factors affecting the barrier height (e. g., density of surface states) vary across the plane of the junction, the resulting properties of the junction are found not to be a linear combination of the properties of the different regions." Id. at 3:2-6.

According to the '395 patent, "a classic metal-semiconductor junction is characterized by a Schottky barrier, the properties of which (e. g., barrier height) depend on surface states, MIGS and inhomogeneities." Ex. 1001, 3:6-9. "Before one can tune the barrier height, however, one must depin the Fermi level of the semiconductor." Id. at 3:16-18. The '395 patent seeks to depin the Fermi level of the semiconductor while still permitting substantial current flow between the metal and the semiconductor. Id. at 3:18-21. The '395 patent describes depinning the Fermi level as follows:

By depinning the Fermi level, the present inventors mean a condition wherein all, or substantially all, dangling bonds that may otherwise be present at the semiconductor surface have been terminated, and the effect of MIGS has been overcome, or at least reduced, by displacing the semiconductor a sufficient distance from the metal.

Id. at 3:36-41. The '395 patent achieves this goal using thin interface layers disposed between a metal and a silicon-based semiconductor to form a "metal-interface layer-semiconductor junction" with minimum specific contact resistances. Id. at 3:25-29. "The interface layer thickness corresponding to this minimum specific contact resistance will vary depending on the materials used." Id. at 3:29-36. That corresponding thickness "allows for depinning the Fermi level while permitting current to flow when the junction is appropriately biased." Id. "Minimum specific contact resistances of less than or equal to approximately 10 Ω-μm² or even less than or equal to approximately 1 Ω-μm² may be achieved for such junctions in accordance with the present invention." Id. at 3:42-45. Such low contact resistances are achieved by selecting a metal with a work function near the conduction band of the semiconductor for n-type semiconductors, or a work function near the valence band for p-type semiconductors. Id. at 5:30-34.

Figure 8 of the '395 patent is reproduced below:

(Image Omitted)

Figure 8 of the '395 patent

Figure 8 above is a graph of interface specific contact resistance versus interface thickness for a structure where the work function of the metal is the same as the electron affinity of the semiconductor, such that the Fermi level of the metal lines up with the conduction band of the semiconductor. Ex 1001, 14:42-48. According to the '395 patent, Figure 8 shows that, at large thicknesses, the interface layer poses significant resistance to current, but as the interface layer thickness decreases, resistance falls due to increased tunneling current. Id. at 14:48-51. However, at some point, as the interface layer gets thinner, the effect of MIGS increasingly pulls the Fermi level of the metal down towards the mid-gap of the semiconductor, creating a Schottky barrier and increasing resistance. Id. at 14:51-55. Thus, there is an optimum thickness where the resistance is at a minimum and the effect of MIGS has been reduced to depin the metal and lower the Schottky barrier, but the layer is sufficiently thin to allow significant current across the interface layer, such that specific contact...