Wang Laboratories, Inc. v. Mitsubishi Electronics America, Inc.

Decision Date03 January 1997
Docket Number95-1324,Nos. 95-1276,s. 95-1276
Citation41 USPQ2d 1263,103 F.3d 1571
PartiesWANG LABORATORIES, INC., Plaintiff-Appellant, v. MITSUBISHI ELECTRONICS AMERICA, INC. and Mitsubishi Electric Corporation, Defendants/Cross-Appellants.
CourtU.S. Court of Appeals — Federal Circuit

Thomas J. Scott, Howrey & Simon, Washington, D.C., argued for plaintiff-appellant. With him on the brief were Robert F. Ruyak and Sheila R. Schreiber.

John W. Kozak, Leydig, Voit & Mayer, Ltd., Chicago, IL, argued for defendants/cross-appellants. With him on the brief were Mark E. Phelps, Brett A. Hesterberg, and Steven P. Petersen. Of counsel on the brief were Les J. Weinstein, Martin J. Trupiano, James B. Woodruff, Daniel E. Robbins, Graham & James, of Los Angeles, California.

Before RICH, MAYER, and SCHALL, Circuit Judges.

Opinion for the court filed by Circuit Judge RICH. Concurring in part and concurring in the judgment opinion filed by Circuit Judge MAYER.

RICH, Circuit Judge.

Appellant Wang Laboratories, Inc. sued Mitsubishi Electronics America, Inc. for infringement of two patents. Mitsubishi and its parent, Mitsubishi Electric Corporation, (collectively "Mitsubishi") filed a declaratory judgment action and the cases were consolidated in the United States District Court for the Central District of California. The district court granted Mitsubishi partial summary judgment of non-infringement of one patent. A jury then found both patents not invalid and that Mitsubishi literally infringed the other patent. But the jury concluded that Wang's conduct in dealing with Mitsubishi created an implied license from Wang to Mitsubishi to practice the invention claimed in the patent held infringed. Wang appeals and Mitsubishi cross-appeals. Since we agree that Mitsubishi was licensed, there was no infringement and we therefore affirm.

BACKGROUND

The two patents in suit relate to memory modules known as "Single In-line Memory Modules" or SIMMs. Generally, Wang's SIMM design consists of nine memory chips with one reserved for parity checking. The module is sometimes described as a "times nine" or "X9" module. The parity chip independently stores additional information allowing a device to verify the validity of data stored in and retrieved from the other eight memory chips. The nine chips are encased in plastic carriers having leads ("leaded") and are arranged in one row, along with associated decoupling capacitors to protect the chips, on a substrate with 30 connective terminal pins. When mounted on the printed-circuit "mother board" of a computer containing the computer's central processing unit, for example, these modules allow the computer to write and read data in binary format to and from the SIMMs for storage. In developing its SIMM, Wang used 64-kilobit ("64K") memory chips. Together, eight 64K memory chips could store 512 kilobits or 64 kilobytes of data (eight binary digits or "bits" constitute one "byte"). More recent SIMMs may contain 256-kilobit ("256K") or larger memory chips.

James Clayton, the named inventor in the patents in suit, joined Wang Laboratories in the fall of 1982. At the time, computer memory components remained relatively large, expensive, and difficult to upgrade. In the spring of 1983, Clayton developed the SIMM as a smaller, lower cost, replaceable form of computer memory. On September 2, 1983, Clayton, with Wang as assignee, applied for a patent on the SIMM invention, application serial number 528,817. The original application contained three claims, all of which the Patent and Trademark Office ("PTO") rejected on June 13, 1985. The PTO based its rejection, in part, on obviousness of the claimed subject matter. Wang amended the application to cancel claims 1, 2, and 3, and to add claims 4, 5, and 6. The new claims clarified that the invention consisted of a single row of memory chips packaged in "plastic leaded chip carriers" for mounting on "epoxy-glass" printed circuit boards. The PTO's final office action, however, rejected the amended claims, this time solely based on obviousness.

Wang submitted a file wrapper continuation application, serial number 873,879, on June 12, 1986, replacing claims 4, 5, and 6 with claim 7. Wang then abandoned the initial application. In "remarks" accompanying the continuation application, Wang argued that the single new claim recited a unique, specific combination of elements distinguishable from the prior art, in particular from "[t]he EDI EDH-4816 publication describ[ing] a single in-line memory module

                which consists of eight ceramic chips mounted on a ceramic substrate.  The module contains thirty-two terminal pins and ten decoupling capacitors on the main voltages."   In contrast, Wang claimed "nine memory chips (eight for data, one for parity) contained in plastic leaded chip carriers and mounted on a[sic] epoxy-glass pc [printed circuit] board of particular dimensions.  The module has thirty terminal pins and eight decoupling capacitors connected between the memory chips to suppress voltage spikes."   The application resulted in patent No. 4,656,605 ('605 patent), issued April 7, 1987.  The single claim reads (emphasis ours)
                
1. A memory module for installation on a printed circuit motherboard comprising:

eight data memory chips for storing digital data, each having a data input and output, a control input, and an address input, and each being packaged in a plastic leaded chip carrier;

a ninth memory chip for storing error detection and correction information associated with the eight data memory chips, said ninth memory chip having a data input and output, a control input and an address input interconnected with those of the eight memory chips, and a control input to provide writing in or reading out of the ninth memory chip at times other than when said bytes of digital information are written into or read out of the eight data memory chips to thereby facilitate said error detection and correction operation;

an epoxy-glass printed circuit board substrate having a length and width adequate for mounting thereon only in a single row said nine memory chips and for interconnecting the control inputs and the address inputs of the memory chips so that bytes of digital information may be input to or output from the memory chips one at a time;

the substrate including thirty terminals for providing access to the data inputs and outputs, control inputs, and address inputs of the nine memory chips to enable reading and writing of bytes of digital information into and out of the eight memory chips and to enable reading and writing of error detection and correction information into and out of the eight memory chips;

support means for supporting the memory module at an angle with respect to the printed circuit motherboard when the memory module is installed thereon; and

eight decoupling capacitors, mounted on said substrate and connected between the nine memory chips, for suppressing transient voltage spikes between said memory chips.

Wang filed another application, on February 20, 1987, as a continuation of application number 873,879. This application comprised two claims and led to patent No. 4,727,513 ('513 patent), which issued on February 23, 1988. The two claims of the '513 patent are as follows:

1. A memory module for installation on a printed circuit motherboard comprising

nine data memory chips for storing digital data, each having a data input and output, control input, and an address input, and each being packaged in a plastic leaded chip carrier, wherein said ninth memory chip is for storing detection and correction information associated with the eight data memory chips,

an epoxy-glass printed circuit board substrate having a length and width adequate for mounting thereon only in a single row said nine memory chips and for interconnecting the control inputs and the address inputs of the memory chips so that bytes of digital information may be input to or output from the memory chips,

the substrate including thirty terminals for providing access to the data inputs and outputs, control inputs, and address inputs of the nine memory chips and to enable reading and writing of information into and out of the nine chips,

support means for supporting the memory module at an angle with respect to a motherboard and

decoupling capacitors mounted on said substrate and coupled to the memory chips for suppressing transient voltages.

2. The module of claim 1 wherein all nine memory chips are interconnected such that data is input to or output from the ninth

memory chips [sic] when data is input to or output from the other eight memory chips.

A panel of Wang employees, including Clayton, introduced the SIMM technology to members of the computer industry press in June 1983. After giving a detailed description of their invention, Wang personnel answered questions. According to the panelists, Wang hoped to preempt the anticipated future introduction of 256K chips by Japanese manufacturers in a format known as the Small Outline Integrated Circuit or SOIC. By combining eight existing 64K chips into a 64-kilobyte package, Wang could introduce immediately a smaller, denser, lower cost memory option. The panel went on to note an expected struggle at the Joint Electronic Device Council ("JEDEC"), a committee of the Electronic Industries Association invested with responsibility for setting industry standards, over which format would become the memory module standard.

Clayton described the period preceding the upcoming JEDEC meetings, with manufacturers awaiting indication of which way the market would go before committing to a module design. He explained Wang's belief that the present introduction of its new package should be the catalyst to sway the industry to its approach. Clayton revealed that Wang would not produce SIMMs. Instead, Wang intended to encourage others to produce the...

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